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Add testdata padding for .vf4 and .vf8 instructions #27

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troibe
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@troibe troibe commented Feb 4, 2024

I'm not sure if this is the prettiest solution but it prevents the accesses to unitialized memory described in #26.

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ksco commented Feb 5, 2024

Thanks for the report! I think this is a bug and the solution should not be a workaround.

.. After looking at the code, I think the issue is in genCodeVdVs2VmP3() function when initializing vd register group with random values at line 44, which should be vdEMUL1 instead of c.LMUL1:

44		builder.WriteString(i.gWriteRandomData(c.LMUL1))
45		builder.WriteString(i.gLoadDataIntoRegisterGroup(vd, vdEMUL1, c.SEW))

.. But, looking at v-spec, a vsext.vf4 v8,v16 with LMUL=2 should write v8-v15, since we're extending the source register group from v16-v17 with LMUL=2 to dest register group v8-v15 with LMUL=8, right?

So IIUC this is indeed a mistake in the test suite, but I think there is something wrong with your emulator too.

@ksco ksco self-requested a review February 5, 2024 03:59
@troibe
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troibe commented Feb 5, 2024

Yes, I also think there is something wrong in the lmul calculation but I'm not sure if your proposed fix would be the right one either. Instead I think it should be #28.

.. But, looking at v-spec, a vsext.vf4 v8,v16 with LMUL=2 should write v8-v15, since we're extending the source register group from v16-v17 with LMUL=2 to dest register group v8-v15 with LMUL=8, right?

The way I read the following lines in the spec is that source eew (=sew/4=16) and emul (=lmul/4=1/2) are smaller than the destination eew (=sew=64) and emul (=lmul=2).

The EEW of the source is 1/2, 1/4, or 1/8 of SEW, while EMUL of the source is (EEW/SEW)*LMUL. The destination has EEW equal to SEW and EMUL equal to LMUL.

@troibe troibe closed this Feb 5, 2024
@troibe troibe deleted the add-testdata-padding-vf4-vf8 branch April 2, 2024 06:49
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2 participants